;; Copyright 1987 by NeXT Inc. ;; Author - John Strawn ;; ;; Modification history ;; -------------------- ;; 06/23/87/jms - initial file created from DSPAPSRC/template ;; 02/15/88/jms - change neg B to tst B in initialization ;; - added OPTIONAL_NOP ;; 02/23/88/jms - cosmetic changes to code and documentation ;; 03/29/88/jms - fix bugs in CALLING DSP PROGRAM TEMPLATE ;; ;; ------------------------------ DOCUMENTATION --------------------------- ;; NAME ;; veqv - vector logical equivalence ;; - not xor two vectors, creating a third ;; ;; SYNOPSIS ;; include 'stdmacros' ; load standard DSP macro package ;; veqv pf,ic,sinp_a,ainp_a0,iinp_a0,sinp_b,ainp_b0,iinp_b0,sout,aout0,iout0,cnt0 ;; ;; MACRO ARGUMENTS ;; pf = global label prefix (any text unique to invoking macro) ;; ic = instance count (such that pf\_veqv_\ic is globally unique) ;; sinp_a = input vector A memory space ('x' or 'y') ;; ainp_a0 = input vector A base address (address of A[1,1]) ;; iinp_a0 = initial increment for input vector A ;; sinp_b = input vector B memory space ('x' or 'y') ;; ainp_b0 = input vector B base address ;; iinp_b0 = initial increment for input vector B ;; sout = output vector C memory space ('x' or 'y') ;; aout0 = output vector C base address ;; iout0 = initial increment for output vector C ;; cnt0 = initial element count ;; ;; DSP MEMORY ARGUMENTS ;; Access Description Initialization ;; ------ ----------- -------------- ;; x:(R_X)+ input vector A base address ainp_a0 ;; x:(R_X)+ input vector A increment iinp_a0 ;; x:(R_X)+ input vector B base address ainp_b0 ;; x:(R_X)+ input vector B increment iinp_b0 ;; x:(R_X)+ output vector C base address aout0 ;; x:(R_X)+ output vector C increment iout0 ;; x:(R_X)+ element count cnt0 ;; ;; DESCRIPTION ;; The veqv array-processor macro computes C=A NOT XOR B. ;; In pseudo-C notation: ;; ;; ainp_a = x:(R_X)+; ;; iinp_a = x:(R_X)+; ;; ainp_b = x:(R_X)+; ;; iinp_a = x:(R_X)+; ;; aout = x:(R_X)+; ;; iout = x:(R_X)+; ;; cnt = x:(R_X)+; ;; ;; for (n=0;n